june 2014 fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 1 mosfet maximum ratings t c = 25 o c unless otherwise noted. thermal characteristics symbol parameter fqpf13N50CF unit v dss drain to source voltage 500 v i d drain current - continuous (t c = 25 o c) 13 a - continuous (t c = 100 o c) 8a i dm drain current - pulsed (note 1) 52 a v gss gate to source voltage 30 v e as single pulsed avalanche energy (note 2) 530 mj i ar avalanche current (note 1) 13 a e ar repetitive avalanche energy (note 1) 19.5 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 o c) 48 w - derate above 25 o c 0.39 w/c t j , t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 c symbol parameter fqpf13N50CF unit r jc thermal resistance, junction to case, max. 2.58 c / w r ja thermal resistance, junction to ambient, max. 62.5 *drain current limited by maximum junction temperature fqpf13N50CF n-channel qfet ? frfet ? mosfet 500 v, 13 a, 540 m features ? 13 a, 500 v, r ds(on) = 540 m ? (max.) @ v gs = 10 v, i d = 6.5 a ? low gate charge (typ. 43 nc) ? low crss (typ. 20 pf) ? 100% avalanche tested ? fast recovery body diode (typ. 100 ns) description this n-channel enhancement mode power mosfet is produced using fairchild semiconductor?s proprietary planar stripe and dmos technology. this advanced mosfet technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. these devices are suitable for switched mode power supplies, active power factor correction (pfc), and electronic lamp ballasts. to-220f g d s g s d
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted. notes: 1. repetitive rating : pulse width limited by maximum junction temperature. 2. l = 5.6 mh, i as = 13 a, v dd = 50 v, r g = 25 , starting t j = 25c. 3. i sd 13 a, di/dt 200 a/ s, v dd bv dss, starting t j = 25c. 4. essentially independent of operating temperature. device marking device package reel size tape width quantity fqpf13N50CF fqpf13N50CF to-220f tube n/a 50 units symbol parameter test conditions min typ max unit off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 500 -- -- v bv dss / t j breakdown voltage temperature coeffi- cient i d = 250 a, referenced to 25c -- 0.5 -- v/c i dss zero gate voltage drain current v ds = 500 v, v gs = 0 v -- -- 10 a v ds = 400 v, t c = 125c -- -- 100 a i gssf gate-body leakage current, forward v gs = 30 v, v ds = 0 v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -30 v, v ds = 0 v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.0 -- 4.0 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 6.5 a -- 0.43 0.54 g fs forward transconductance v ds = 40 v, i d = 6.5 a -- 15 -- s dynamic characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz -- 1580 2055 pf c oss output capacitance -- 180 235 pf c rss reverse transfer capacitance -- 20 25 pf switching characteristics t d(on) turn-on delay time v dd = 250 v, i d = 13 a, r g = 25 (note 4) -- 25 60 ns t r turn-on rise time -- 100 210 ns t d(off) turn-off delay time -- 130 270 ns t f turn-off fall time -- 100 210 ns q g total gate charge v ds = 400 v, i d = 13 a, v gs = 10 v (note 4) -- 43 56 nc q gs gate-source charge -- 7.5 -- nc q gd gate-drain charge -- 18.5 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 13 a i sm maximum pulsed drain-source diode forward current -- -- 52 a v sd drain-source diode forward voltage v gs = 0 v, i s = 13 a -- -- 1.4 v t rr reverse recovery time v gs = 0 v, i s = 13 a, di f / dt = 100 a/ s -- 100 160 ns q rr reverse recovery charge -- 0.35 -- c
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 3 10 -1 10 0 10 1 0 500 1000 1500 2000 2500 3000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd notes ; 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] v ds , drain-source voltage [v] 0 1020304050 0 2 4 6 8 10 12 v ds = 250v v ds = 100v v ds = 400v note : i d = 13a v gs , gate-source voltage [v] q g , total gate charge [nc] typical characteristics 0.2 0.4 0.6 0.8 1.0 1.2 1.4 10 -1 10 0 10 1 150 notes : 1. v gs = 0v 2. 250 s pulse test 25 i dr , reverse drain current [a] v sd , source-drain voltage [v] 0 5 10 15 20 25 30 35 0.5 1.0 1.5 v gs = 20v v gs = 10v note : t j = 25 r ds(on) [ ? ], drain-source on-resistance i d , drain current [a] figure 5. capacitance characteristics fi gure 6. gate charge characteristics figure 3. on-resistance variation vs drain current and gate voltage figure 4. body diode forward voltage variation with source current and temperature figure 2. transfer characteristics figure 1. on-region characteristics 10 -1 10 0 10 1 10 -1 10 0 10 1 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v bottom : 4.5 v notes : 1. 250 s pulse test 2. t c = 25 i d , drain current [a] v ds , drain-source voltage [v] 246810 10 -1 10 0 10 1 150 o c 25 o c -55 o c notes : 1. v ds = 40v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v]
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 4 -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 notes : 1. v gs = 10 v 2. i d = 6.5 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] 10 0 10 1 10 2 10 3 10 -2 10 -1 10 0 10 1 10 2 100 ms 10 s dc 10 ms 1 ms 100 s operation in this area is limited by r ds( on) notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] typical characteristics (continued) figure 10. maximum drain current vs case temperature figure 7. breakdown voltage variation vs temperature figure 8. on-resistance variation vs temperature figure 9. maximum safe operating area 25 50 75 100 125 150 0 2 4 6 8 10 12 14 i d , drain current [a] t c , case temperature [ ] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 notes : 1. z jc (t) = 2.58 /w max. 2. d uty factor, d =t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2 z jc (t), thermal response [ o c/w]
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 5 figure 12. gate charge test circuit & waveform figure 13. resistive switch ing test circuit & waveforms figure 14. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l l i d i d t p v gs v gs i g = const.
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 6 figure 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 7 mechanical dimensions figure 16. to220, molded, 3-lead, full pack, eiaj sc91, straight lead package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_tf220-003
fqpf13N50CF ? n-channel qfet ? frfet ? mosfet ?2006 fairchild semiconductor corporation fqpf13N50CF rev. c2 www.fairchildsemi.com 8 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the term s of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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